What is IP geofencing?

Very-large-scale integration or VLSI chips integrate several high-level components, which are highly sophisticated gate-level circuits. Semiconductor Intellectual Property (IP) is the standard source for synthesizing higher-level components in VLSI chips or FPGA boards.

Semiconductor IPs typically provide the hardwired, implementable design of one of the following:

A transform
An encryption or deciphering algorithm
The adaptive filtering of a signal
The implementation of an internet or communication protocol like HTTP, FTP, Bluetooth, USB, or WiFi

However, as semiconductor companies collaborate with a network of design teams in different countries, there’s a risk of IP leak, which is the leakage of a user’s real IP address while connected to a network. This is particularly true if the design is included in a collection of semiconductor IPs.

For this reason, it’s essential that due diligence is followed and that such designs are only visible to authorized users and locations. Aside from the possibility of an IP Ieak, there’s also the risk of IP theft. Either incident can cost an organization millions of dollars.

Typically, high-technology semiconductor IPs are controlled technology requiring confidentiality to eliminate the risk of leaks or theft. IP geofencing is an effective measure to prevent both risks.

What is IP geofencing?
IP geofencing is a security measure, safeguarding against IP leaks by restricting IP availability by geography. These restrictions are applied regardless of a user’s access permissions because leaks can be accidental or intentional.

Common causes of IP leaks are insufficient access controls, delivery of semiconductor IPs outside the managed interfaces, and untraceable embedded IPs. Geofencing prevents such risks.

How does geofencing work?
Managing access control and IP geofencing work together. Semiconductor IPs are often protected via use models. The access to the design is controlled via user permissions. Some users might have read-only access, while others are authorized to edit the designs, which involves creating a permissions hub.

The hub controls all intellectual property’s read and write permissions and manages the regional permissions that apply to each IP. An organization lists the different geographical regions, applying the IP protection rules to each region within the IP portfolio.

The regional protection rules are typically applied in a hierarchy. If a protected IP is a part of a larger IP tree, exporting the design can also lead to leaks. This is why the geographical restrictions are applied across the IP hierarchy. So, when a larger design is exported, access to the protected IP within the design is protected under geographical restrictions.

Chip designers in a restricted location can access the larger design with the support of partial workspaces. In this case, the designers could use the protected IPs but not access or edit them. The IP geofencing always overrides the user permissions.

Geofencing effectively avoids accidental and intentional IP leaks, which is essential for protecting controlled technology and saving costs.